抄録
An internal speed-up crossbar-type ATM switch architecture is proposed. This switch accommodates 10 Gbit/s cell streams from AHMs in order to guarantee the QoS of switched cells. A new high-speed arbitration algorithm using three buses on each output line, called the bi-directional arbiter, is used. It handles output contention about twice as fast as the conventional ring-arbiter and has the same fairness function. It increases the switch throughput to 160 Gbit/s efficiently. By combining the high-speed switch and AHMs, it will be able to make a sub-terabit/s ATM switching system for future Broadband ISDN networks.
本文言語 | English |
---|---|
ページ(範囲) | 20-27 |
ページ数 | 8 |
ジャーナル | NTT Review |
巻 | 9 |
号 | 2 |
出版ステータス | Published - 1997 3月 |
外部発表 | はい |
ASJC Scopus subject areas
- コンピュータ ネットワークおよび通信
- 電子工学および電気工学