抄録
As a switch architecture of the AMC with switch throughput of 160 Gbit/s, we proposed an internal speed-up crossbar-type ATM switch architecture. This switch accommodates 10-Gbit/s cell streams from AHMs in order to guarantee the QoS of switched cells. A new high-speed arbitration algorithm using three buses on each output line, called the bidirectional arbiter, is used. This handles output contention about twice as fast as the conventional ring-arbiter and has the same fairness function. This increases the switch throughput to 160 Gbit/s efficiently. By combining our high-speed switch and AHMs, we should be able to make a sub-terabit/s ATM switching system for the future Broadband ISDN network.
本文言語 | English |
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ページ(範囲) | 847-853 |
ページ数 | 7 |
ジャーナル | NTT R and D |
巻 | 45 |
号 | 9 |
出版ステータス | Published - 1996 12月 1 |
外部発表 | はい |
ASJC Scopus subject areas
- 電子工学および電気工学