抄録
This paper describes newly developed advanced ATM switching system hardware structures. They are based on the Si-Substrate MCM-D technology which integrates ASIC custom VLSIs, high-speed S-RAMs and FPGAs (Field Programmable Gate Arrays). The MCM-D module realizes the ATM layer function by combining a high-performance ASIC with high-speed S-RAM cache. This is made possible by high density packaging and high-speed (20 ns) access to 1-Mbit of memory. The MCM employs 8 S-RAMs, possible with the stacked RAM technique, to reduce module size. This sub-module technology and MCM technology will advance the development of practical B-ISDN ATM switching systems.
本文言語 | English |
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ページ | 286-289 |
ページ数 | 4 |
出版ステータス | Published - 1997 1月 1 |
外部発表 | はい |
イベント | Proceedings of the 1997 IEEE/CPMT 20th International Electronic Manufacturing Symposium - Tokyo, Jpn 継続期間: 1997 4月 16 → 1997 4月 18 |
Other
Other | Proceedings of the 1997 IEEE/CPMT 20th International Electronic Manufacturing Symposium |
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City | Tokyo, Jpn |
Period | 97/4/16 → 97/4/18 |
ASJC Scopus subject areas
- 産業および生産工学
- 電子工学および電気工学