An 0.5V, 0.91pJ/bit, 1.1Gb/s/ch transceiver in 65nm CMOS for high-speed wireless proximity interface

Takeshi Matsubara; Isamu Hayashi; Abul Hasan Johari; Satoshi Kumaki; Kaoru Kohira; Tadahiro Kuroda; Hiroki Ishikuro

doi:10.1109/RWS.2011.5725473

An 0.5V, 0.91pJ/bit, 1.1Gb/s/ch transceiver in 65nm CMOS for high-speed wireless proximity interface

Takeshi Matsubara, Isamu Hayashi, Abul Hasan Johari, Satoshi Kumaki, Kaoru Kohira, Tadahiro Kuroda, Hiroki Ishikuro

研究成果: Conference contribution

6 被引用数 (Scopus)

抄録

This paper presents a pulse-based inductivecoupling transceiver in 65nm CMOS for high-speed wireless proximity communication. The transceiver operates at 0.5V supply voltage. A pulse bootstrap circuit and a common drain output stage enables transmitter to operate at ultralow voltage. In the receiver, a gain boosted common-gate amplifier is used to reduce the input impedance and suppress the ringing of received pulse signal. The data rate and energy efficiency are 1.1Gb/s/ch and 0.91pJ/bit, respectively at 0.5V supply voltage. The data rate can be increased to 1.7Gb/s/ch at 0.75V.

本文言語	English
ホスト出版物のタイトル	2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011
ページ	74-77
ページ数	4
DOI	https://doi.org/10.1109/RWS.2011.5725473
出版ステータス	Published - 2011 3月 31
イベント	2011 IEEE Radio and Wireless Symposium, RWS 2011 - Phoenix, AZ, United States 継続期間: 2011 1月 16 → 2011 1月 19

出版物シリーズ

名前	2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011

Other

Other	2011 IEEE Radio and Wireless Symposium, RWS 2011
国/地域	United States
City	Phoenix, AZ
Period	11/1/16 → 11/1/19

ASJC Scopus subject areas

コンピュータネットワークおよび通信
通信

UN SDG

この成果は、次の持続可能な開発目標に貢献しています

文献へのアクセス

10.1109/RWS.2011.5725473

他のファイルとリンク

引用スタイル

Matsubara, T., Hayashi, I., Johari, A. H., Kumaki, S., Kohira, K., Kuroda, T., & Ishikuro, H. (2011). An 0.5V, 0.91pJ/bit, 1.1Gb/s/ch transceiver in 65nm CMOS for high-speed wireless proximity interface. In 2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011 (pp. 74-77). Article 5725473 (2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011). https://doi.org/10.1109/RWS.2011.5725473

An 0.5V, 0.91pJ/bit, 1.1Gb/s/ch transceiver in 65nm CMOS for high-speed wireless proximity interface. / Matsubara, Takeshi; Hayashi, Isamu; Johari, Abul Hasan その他.
2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011. 2011. p. 74-77 5725473 (2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011).

研究成果: Conference contribution

Matsubara, T, Hayashi, I, Johari, AH, Kumaki, S, Kohira, K, Kuroda, T & Ishikuro, H 2011, An 0.5V, 0.91pJ/bit, 1.1Gb/s/ch transceiver in 65nm CMOS for high-speed wireless proximity interface. in 2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011., 5725473, 2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011, pp. 74-77, 2011 IEEE Radio and Wireless Symposium, RWS 2011, Phoenix, AZ, United States, 11/1/16. https://doi.org/10.1109/RWS.2011.5725473

Matsubara T, Hayashi I, Johari AH, Kumaki S, Kohira K, Kuroda T その他. An 0.5V, 0.91pJ/bit, 1.1Gb/s/ch transceiver in 65nm CMOS for high-speed wireless proximity interface. In 2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011. 2011. p. 74-77. 5725473. (2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011). doi: 10.1109/RWS.2011.5725473

Matsubara, Takeshi ; Hayashi, Isamu ; Johari, Abul Hasan その他. / An 0.5V, 0.91pJ/bit, 1.1Gb/s/ch transceiver in 65nm CMOS for high-speed wireless proximity interface. 2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011. 2011. pp. 74-77 (2011 IEEE Radio and Wireless Week, RWW 2011 - 2011 IEEE Radio and Wireless Symposium, RWS 2011).

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abstract = "This paper presents a pulse-based inductivecoupling transceiver in 65nm CMOS for high-speed wireless proximity communication. The transceiver operates at 0.5V supply voltage. A pulse bootstrap circuit and a common drain output stage enables transmitter to operate at ultralow voltage. In the receiver, a gain boosted common-gate amplifier is used to reduce the input impedance and suppress the ringing of received pulse signal. The data rate and energy efficiency are 1.1Gb/s/ch and 0.91pJ/bit, respectively at 0.5V supply voltage. The data rate can be increased to 1.7Gb/s/ch at 0.75V.",

keywords = "Bootstrap, High speed interface, Inductive-coupling, Proximity communication, Ultra-low voltage",

author = "Takeshi Matsubara and Isamu Hayashi and Johari, {Abul Hasan} and Satoshi Kumaki and Kaoru Kohira and Tadahiro Kuroda and Hiroki Ishikuro",

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AU - Johari, Abul Hasan

AU - Kumaki, Satoshi

AU - Kohira, Kaoru

AU - Kuroda, Tadahiro

AU - Ishikuro, Hiroki

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An 0.5V, 0.91pJ/bit, 1.1Gb/s/ch transceiver in 65nm CMOS for high-speed wireless proximity interface

抄録

出版物シリーズ

Other

ASJC Scopus subject areas

UN SDG

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