TY - JOUR
T1 - Automatic pipeline construction focused on similarity of rate law functions for an FPGA-based biochemical simulator
AU - Yamada, Hideki
AU - Ogawa, Yui
AU - Ooya, Tomonori
AU - Ishimori, Tomoya
AU - Osana, Yasunori
AU - Yoshimi, Masato
AU - Nishikawa, Yuri
AU - Funahashi, Akira
AU - Hiroi, Noriko
AU - Amano, Hideharu
AU - Shibata, Yuichiro
AU - Oguri, Kiyoshi
PY - 2010
Y1 - 2010
N2 - For FPGA-based scientific simulation systems, hardware design technique that can reduce required amount of hardware resources is a key issue, since the size of simulation target is often limited by the size of the FPGA. Focusing on FPGA-based biochemical simulation, this paper proposes hardware design methodology which finds and combines common datapath for similar rate law functions appeared in simulation target models, so as to generate area-effective pipelined hardware modules. In addition, similarity-based clustering techniques of rate law functions are also presented in order to alleviate negative effects on performance for combined pipelines. Empirical evaluation with a practical biochemical model reveals that our method enables the simulation with 66% of the original hardware resources at a reasonable cost of 20% performance overhead.
AB - For FPGA-based scientific simulation systems, hardware design technique that can reduce required amount of hardware resources is a key issue, since the size of simulation target is often limited by the size of the FPGA. Focusing on FPGA-based biochemical simulation, this paper proposes hardware design methodology which finds and combines common datapath for similar rate law functions appeared in simulation target models, so as to generate area-effective pipelined hardware modules. In addition, similarity-based clustering techniques of rate law functions are also presented in order to alleviate negative effects on performance for combined pipelines. Empirical evaluation with a practical biochemical model reveals that our method enables the simulation with 66% of the original hardware resources at a reasonable cost of 20% performance overhead.
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U2 - 10.2197/ipsjtsldm.3.244
DO - 10.2197/ipsjtsldm.3.244
M3 - Article
AN - SCOPUS:79954560908
SN - 1882-6687
VL - 3
SP - 244
EP - 256
JO - IPSJ Transactions on System LSI Design Methodology
JF - IPSJ Transactions on System LSI Design Methodology
ER -