TY - GEN
T1 - BIPOLAR GBIT/S 8 multiplied by 8 BIT S/P, P/S CONVERTER LSI.
AU - Hirata, Michihiro
AU - Suzuki, Masao
AU - Yamanaka, Naoaki
AU - Yamamoto, Yousuke
PY - 1986/12/1
Y1 - 1986/12/1
N2 - A Si bipolar very high-speed 8-channel multiplied by 8-bit Serial/Parallel and Parallel/Serial conversion LSI (SPPS-LSI), having 1. 5 Gb/s throughput is developed for high-speed digital communication systems. To achieve high performance, a novel data conversion method is adopted. By applying a sophisticated circuit design and SST-1A process technology, a high-speed and low-power LSI is achieved with small chip size.
AB - A Si bipolar very high-speed 8-channel multiplied by 8-bit Serial/Parallel and Parallel/Serial conversion LSI (SPPS-LSI), having 1. 5 Gb/s throughput is developed for high-speed digital communication systems. To achieve high performance, a novel data conversion method is adopted. By applying a sophisticated circuit design and SST-1A process technology, a high-speed and low-power LSI is achieved with small chip size.
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M3 - Conference contribution
AN - SCOPUS:0022901405
SN - 493081314X
T3 - Conference on Solid State Devices and Materials
SP - 271
EP - 274
BT - Conference on Solid State Devices and Materials
PB - Business Cent for Academic Soc Japan
ER -