TY - GEN
T1 - Body bias optimization for variable pipelined CGRA
AU - Kojima, Takuya
AU - Ando, Naoki
AU - Okuhara, Hayate
AU - Doan, Ng Anh Vu
AU - Amano, Hideharu
N1 - Funding Information:
This work has been done within the “Ultra-Low Voltage Device Project” of LEAP funded and supported by METI and NEDO. It has also been supported by the VLSI Design and Education Center (VDEC) from the University of Tokyo in collaboration with Cadence Design Systems, Inc. The stay of Ng. Anh Vu Doan in Keio University has been supported by the Erasmus Mundus EASED programme (Grant 2012-5538/004-001) coordinated by CentraleSupélec.
Publisher Copyright:
© 2017 Ghent University.
PY - 2017/10/2
Y1 - 2017/10/2
N2 - Variable Pipeline Cool Mega Array (VPCMA) is an low power Coarse Grained Reconfigurable Architecture (CGRA) based on the concept of CMA (Cool Mega Array). It implements a pipeline structure that can be configured depending on performance requirements, and the silicon on thin buried oxide (SOTB) technology that allows to control its body bias voltage to balance performance and leakage power. In this paper, we propose a methodology to optimize exactly with an Integer Linear Program the VPCMA body bias while considering simultaneously its variable pipeline structure. For the studied applications, we evaluate that it is possible to achieve an average reduction of energy consumption of 19.3% and 11.8% when compared to respectively the zero bias (without body bias control) and the uniform (control of the whole PE array) cases, while respecting performance constraints. Besides, with appropriate body bias control, it is possible to extend the possible performance, hence enabling broader trade-off analyzes between consumption and performance. These promising results show that applying an adequate optimization technique for the body bias control while simultaneously considering pipeline structures can not only enable further power reduction than previous methods, but also allow more trade-off analysis possibilities.
AB - Variable Pipeline Cool Mega Array (VPCMA) is an low power Coarse Grained Reconfigurable Architecture (CGRA) based on the concept of CMA (Cool Mega Array). It implements a pipeline structure that can be configured depending on performance requirements, and the silicon on thin buried oxide (SOTB) technology that allows to control its body bias voltage to balance performance and leakage power. In this paper, we propose a methodology to optimize exactly with an Integer Linear Program the VPCMA body bias while considering simultaneously its variable pipeline structure. For the studied applications, we evaluate that it is possible to achieve an average reduction of energy consumption of 19.3% and 11.8% when compared to respectively the zero bias (without body bias control) and the uniform (control of the whole PE array) cases, while respecting performance constraints. Besides, with appropriate body bias control, it is possible to extend the possible performance, hence enabling broader trade-off analyzes between consumption and performance. These promising results show that applying an adequate optimization technique for the body bias control while simultaneously considering pipeline structures can not only enable further power reduction than previous methods, but also allow more trade-off analysis possibilities.
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U2 - 10.23919/FPL.2017.8056851
DO - 10.23919/FPL.2017.8056851
M3 - Conference contribution
AN - SCOPUS:85034448786
T3 - 2017 27th International Conference on Field Programmable Logic and Applications, FPL 2017
BT - 2017 27th International Conference on Field Programmable Logic and Applications, FPL 2017
A2 - Gohringer, Diana
A2 - Stroobandt, Dirk
A2 - Mentens, Nele
A2 - Santambrogio, Marco
A2 - Nurmi, Jari
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 27th International Conference on Field Programmable Logic and Applications, FPL 2017
Y2 - 4 September 2017 through 6 September 2017
ER -