抄録
A snoop cache protocol is proposed for the WSI implementation which minimizes the access to the shared memory. In modified-Keio protocol, both write-invalidate and write-update type protocols can be used according to the nature of the shared data. It also supports the simple synchronization mechanism with Fetch&Dec operation and inter-processor interrupt. Detailed simulation with practical parallel applications demonstrates the efficiency of this proposed protocol.
本文言語 | English |
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ページ(範囲) | 238-247 |
ページ数 | 10 |
ジャーナル | Proceedings of the Annual IEEE International Conference on Innovative Systems in Silicon |
出版ステータス | Published - 1995 1月 1 |
外部発表 | はい |
イベント | Proceedings of the 7th Annual IEEE International Conference on Wafer Scale Integration - San Francisco, CA, USA 継続期間: 1995 1月 18 → 1995 1月 20 |
ASJC Scopus subject areas
- ハードウェアとアーキテクチャ
- 電子工学および電気工学
- 凝縮系物理学