Cooperative shared resource access control for low-power chip multiprocessors

Noriko Takagi, Hiroshi Sasaki, Masaaki Kondo, Hiroshi Nakamura

研究成果: Conference contribution

7 被引用数 (Scopus)

抄録

In a single-chip multiprocessor (CMP), the last-level cache and its lower memory hierarchy components are typically shared by multiple processors. Conflicts in these resources lead to poor overall performance of the CMP and/or unpredictable performance of the individual cores. If applications on different cores have different performance constraints, even though these constraints can be satisfied by dynamic voltage and frequency scaling (DVFS) control of each core, conflicts in shared resources will lead to increased power consumption. Therefore, in the present paper, we derive a condition whereby, under resource conflicts, the total power consumption is minimized by a newly developed power consumption model and propose a method by which to minimize the power consumption of CMPs by cooperative access control of multiple shared resources and DVFS control. Experimental results reveal that the proposed technique can reduce power consumption by 15% on average in a dual-core CMP and by 13% in a quad-core CMP, as compared to the case in which only DVFS control is applied.

本文言語English
ホスト出版物のタイトルISLPED'09 - Proceedings of the 2009 ACM/IEEE International Symposium on Low Power Electronics and Design
ページ177-182
ページ数6
DOI
出版ステータスPublished - 2009
外部発表はい
イベント2009 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'09 - San Fancisco, CA, United States
継続期間: 2009 8月 192009 8月 21

出版物シリーズ

名前Proceedings of the International Symposium on Low Power Electronics and Design
ISSN(印刷版)1533-4678

Conference

Conference2009 ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED'09
国/地域United States
CitySan Fancisco, CA
Period09/8/1909/8/21

ASJC Scopus subject areas

  • 工学一般

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