TY - GEN
T1 - Hardware for Accelerating Anonymization Transparent to Network
AU - Shohata, Soichiro
AU - Nakamura, Yuuichi
AU - Nishi, Hiroaki
N1 - Funding Information:
This work was supported by Technology Foundation of the R&D project “Design of Information and Communication Platform for Future Smart Community Services” by the Ministry of Internal Affairs and Communications of Japan, grants from the Project of the Bio-oriented Technology Research Advancement Institution, NARO (the research project for the future agricultural production utilizing artificial intelligence), and MEXT/JSPS KAKENHI Grant (B) Number JP16H04455 and JP17H01739, respectively.
Publisher Copyright:
© 2018 IEEE.
PY - 2018/12/27
Y1 - 2018/12/27
N2 - With the increase in the number of Internet of Things (IoT) devices, many applications using the data accumulated from IoT devices have been proposed. Consequently, privacy violation due to data disclosure is becoming a problem. Data anonymization is a technique for publishing data while preserving data privacy and is an effective method for solving the problem of privacy violation. There are several requirements for implementing anonymization systems suitable for IoT devices, where the amount of hardware and software resources, function extensibility, and processing throughput are limited. To satisfy these requirements, anonymization hardware for anonymizing data packets from IoT devices is proposed. The proposed hardware is allocated on the intermediate location of network and anonymizes the data packet stream from IoT devices transparently. The proposed anonymization process does not affect data communication or routing. This transparency allows an additional anonymization function to be installed on all types of IoT devices without modifying the devices. The proposed hardware allows IoT devices to anonymize the data packet stream. To reduce the latency and achieve transparent anonymization at a low cost, the proposed anonymization hardware was implemented using a field-programmable gate array. The throughput and latency of the testbed of the proposed hardware were 1,286 Mbps and 330 ns, respectively. The power consumption of the proposed hardware was lower than that for a software implementation.
AB - With the increase in the number of Internet of Things (IoT) devices, many applications using the data accumulated from IoT devices have been proposed. Consequently, privacy violation due to data disclosure is becoming a problem. Data anonymization is a technique for publishing data while preserving data privacy and is an effective method for solving the problem of privacy violation. There are several requirements for implementing anonymization systems suitable for IoT devices, where the amount of hardware and software resources, function extensibility, and processing throughput are limited. To satisfy these requirements, anonymization hardware for anonymizing data packets from IoT devices is proposed. The proposed hardware is allocated on the intermediate location of network and anonymizes the data packet stream from IoT devices transparently. The proposed anonymization process does not affect data communication or routing. This transparency allows an additional anonymization function to be installed on all types of IoT devices without modifying the devices. The proposed hardware allows IoT devices to anonymize the data packet stream. To reduce the latency and achieve transparent anonymization at a low cost, the proposed anonymization hardware was implemented using a field-programmable gate array. The throughput and latency of the testbed of the proposed hardware were 1,286 Mbps and 330 ns, respectively. The power consumption of the proposed hardware was lower than that for a software implementation.
KW - FPGA
KW - anonymization
KW - networking
KW - transparency
UR - http://www.scopus.com/inward/record.url?scp=85061481355&partnerID=8YFLogxK
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U2 - 10.1109/CANDAR.2018.00032
DO - 10.1109/CANDAR.2018.00032
M3 - Conference contribution
AN - SCOPUS:85061481355
T3 - Proceedings - 2018 6th International Symposium on Computing and Networking, CANDAR 2018
SP - 181
EP - 187
BT - Proceedings - 2018 6th International Symposium on Computing and Networking, CANDAR 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 6th International Symposium on Computing and Networking, CANDAR 2018
Y2 - 27 November 2018 through 30 November 2018
ER -