TY - CHAP
T1 - In-/Near-Memory Computing
AU - Fujiki, Daichi
AU - Wang, Xiaowei
AU - Subramaniyan, Arun
AU - Das, Reetuparna
N1 - Funding Information:
The authors are grateful to Natalie Enright Jerger (current editor) and Michael Morgan (President and CEO of Morgan & Claypool Publishers) for their support throughout the entire process of preparing this book. This book was written over the course of the COVID pandemic, and would have been impossible without their patience and encouragement. Many thanks to our collaborators for in-memory computing research: David Blaauw, Satish Narayanasamy, Dennis Sylvester, Ravi Iyer, Supreet Jeloka, Shaizeen Aga, Jingcheng Wang, Scott Mahlke, West-ley Weimer, Kevin Skadron, Kyojin Choo, Charles Eckert, and Charles Augustine. The book draws upon years of research with these collaborators, and countless discussions. We would like to thank Onur Mutlu and Rajeev Balasubrominan for several technical discussions on the topics covered in this book. We also greatly appreciate the feedback of anonymous reviewers of this book. The authors are grateful to research sponsorship from Nakajima foundation fellowship, Intel, National Science Foundation, ADA center under JUMP-SRC program, and CFAR center. Finally, the authors deeply appreciate their family members for their unconditional love and support.
Publisher Copyright:
Copyright © 2021 by Morgan & Claypool.
PY - 2021/8/11
Y1 - 2021/8/11
N2 - This book provides a structured introduction of the key concepts and techniques that enable in-/near-memory computing. For decades, processing-in-memory or near-memory computing has been attracting growing interest due to its potential to break the memory wall. Near-memory computing moves compute logic near the memory, and thereby reduces data movement. Recent work has also shown that certain memories can morph themselves into compute units by exploiting the physical properties of the memory cells, enabling in-situ computing in the memory array. While in- and near-memory computing can circumvent overheads related to data movement, it comes at the cost of restricted flexibility of data representation and computation, design challenges of compute capable memories, and difficulty in system and software integration. Therefore, wide deployment of in-/near-memory computing cannot be accomplished without techniques that enable efficient mapping of data-intensive applications to such devices, without sacrificing accuracy or increasing hardware costs excessively. This book describes various memory substrates amenable to in- and near-memory computing, architectural approaches for designing efficient and reliable computing devices, and opportunities for in-/near-memory acceleration of different classes of applications. Table of Contents: Preface / Acknowledgments / Introduction / Technology Basics and Taxonomy / Computing with DRAMs / Computing with SRAMs / Computing with Non-Volatile Memories / Domain-Specific Accelerators / Programming Models / Closing Thoughts / Bibliography / Authors' Biographies.
AB - This book provides a structured introduction of the key concepts and techniques that enable in-/near-memory computing. For decades, processing-in-memory or near-memory computing has been attracting growing interest due to its potential to break the memory wall. Near-memory computing moves compute logic near the memory, and thereby reduces data movement. Recent work has also shown that certain memories can morph themselves into compute units by exploiting the physical properties of the memory cells, enabling in-situ computing in the memory array. While in- and near-memory computing can circumvent overheads related to data movement, it comes at the cost of restricted flexibility of data representation and computation, design challenges of compute capable memories, and difficulty in system and software integration. Therefore, wide deployment of in-/near-memory computing cannot be accomplished without techniques that enable efficient mapping of data-intensive applications to such devices, without sacrificing accuracy or increasing hardware costs excessively. This book describes various memory substrates amenable to in- and near-memory computing, architectural approaches for designing efficient and reliable computing devices, and opportunities for in-/near-memory acceleration of different classes of applications. Table of Contents: Preface / Acknowledgments / Introduction / Technology Basics and Taxonomy / Computing with DRAMs / Computing with SRAMs / Computing with Non-Volatile Memories / Domain-Specific Accelerators / Programming Models / Closing Thoughts / Bibliography / Authors' Biographies.
KW - accelerator architecture
KW - domain-specific accelerators
KW - DRAM
KW - flash memory
KW - in-memory computing
KW - memristor
KW - near-memory computing
KW - non-volatile memories
KW - processing-in-memory
KW - ReRAM
KW - SRAM
UR - http://www.scopus.com/inward/record.url?scp=85112763756&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85112763756&partnerID=8YFLogxK
U2 - 10.2200/S01109ED1V01Y202106CAC057
DO - 10.2200/S01109ED1V01Y202106CAC057
M3 - Chapter
AN - SCOPUS:85112763756
T3 - Synthesis Lectures on Computer Architecture
SP - 1
EP - 124
BT - Synthesis Lectures on Computer Architecture
PB - Morgan and Claypool Publishers
ER -