抄録
This paper presents an approximated log-likelihood ratio calculation scheme with bit shifts and summations. Our previous work yielded a metric calculation scheme that replaces multiplications with bit shifts and summations in the selection of candidate signal points for joint maximum likelihood detection (MLD). Log-likelihood ratio calculation for turbo decoding generally uses multiplications and by replacing them with bit shifts and summations it is possible to reduce the numbers of logic operations under specific transmission parameters. In this paper, an approximated log-likelihood ratio calculation scheme that substitutes bit shifts and summations for multiplications is proposed. In the proposed scheme, additions are used only for higher-order bits. Numerical results obtained through computer simulation show that this scheme can eliminate multiplications in turbo decoding at the cost of just 0:2 dB performance degradation at a BER of 10-4.
本文言語 | English |
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ページ(範囲) | 731-739 |
ページ数 | 9 |
ジャーナル | IEICE Transactions on Communications |
巻 | E101B |
号 | 3 |
DOI | |
出版ステータス | Published - 2018 3月 |
ASJC Scopus subject areas
- ソフトウェア
- コンピュータ ネットワークおよび通信
- 電子工学および電気工学