Mitigating Process Variations with Cooperative Tuning for Performance and Power through a Simple DSL

As the feature size of transistors continues to scale down, process variations have been a critical issue for large scale computer systems, such as high-performance or warehouse-scale computers, to realize energy efficient operations. With process variations, it is very hard to effectively utilize the given power budget for such systems as many components inside them simply draw different amount of power for the same performance, even if they have the same hardware specifications. To allow such computer systems to operate in an accurate and energy-efficient manner, we demonstrate how calibrations, modelling and load balancing are realized to address process variations with an simple in-house DSL. With our case studies and evaluations, we prove the effectiveness of our tools and approaches as the impacts from process variations in our experimental system is minimized with considerably smaller amount of effort, which leads to highly energy efficient executions of parallel applications and dramatic reductions in profiling overheads.