抄録
An expandable Si bipolar 2.4Gbit/s throughput, 52Mbit/s 48-channel time-division switching LSI system is described. A high-throughput of 2.4Gbit/s and a power-dissipation of 5-3 W are achieved by adopting a low-voltage swing fourserial-gated differential bipolar circuit design and super selfaligned process (SST-1A) logic-in-memory LSI technology. This LSI is applicable to the digital video time-division switching and digital crossconnect systems of future B-ISDN.
| 本文言語 | English |
|---|---|
| ページ（範囲） | 524-526 |
| ページ数 | 3 |
| ジャーナル | Electronics Letters |
| 巻 | 26 |
| 号 | 8 |
| DOI | |
| 出版ステータス | Published - 1990 1月 1 |
| 外部発表 | はい |
ASJC Scopus subject areas
- 電子工学および電気工学