抄録
A multi-stage switching architecture is a key technology for budding a high-speed ATM switching system. An effective way to make a multi-stage switch nonblocking is to use cell-based routing. However, cell-based routing may cause cell-sequence disorder at the output of the switching fabric. This paper proposes a hierarchical cell-sorting (HCS) switch architecture, which is a nonblocking multi-stage AIM switch using cell-based routing technology. Each basic HCS switch performs cell sorting at every crosspoint, based on timestamp information in the cell-header. This arranges the cells in sequence at the output of each basic HCS switch, since the crosspoints are hierarchically interconnected from the input port to the output port of a basic HCS switch. A multi-stage HCS switch is constructed by interconnecting the input and output lines of these basic HCS switches in a hierarchical manner. Thus, the cell sequence in each final output of the multi-stage switch is preserved in a hierarchical manner. In this way, cell-based routing with 100% throughput is achieved, with no need for internal speed-up techniques.
本文言語 | English |
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ページ | 265-270 |
ページ数 | 6 |
出版ステータス | Published - 1999 1月 1 |
外部発表 | はい |
イベント | Proceedings of the 1999 5th IEEE ATM Workshop 'Opening the New Horizons toward Global Multimedia Services' - Kochi, Jpn 継続期間: 1999 5月 24 → 1999 5月 27 |
Other
Other | Proceedings of the 1999 5th IEEE ATM Workshop 'Opening the New Horizons toward Global Multimedia Services' |
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City | Kochi, Jpn |
Period | 99/5/24 → 99/5/27 |
ASJC Scopus subject areas
- 工学(全般)