Parallel Binary Adders with a Minimum Number of Connections

Akito Sakurai, Saburo Muroga

研究成果: Article査読

7 被引用数 (Scopus)

抄録

An n-bit parallel binary adder consisting of NOR gates only in single-rail input logic is proved to require at least 17n + 1 connections for any value of n. Such an adder is proved to require at least 7n + 2 gates. An adder that attains these minimal values is shown. Also, it is concluded that some of the parallel adders with the minimum number of NOR gates derived by Lai and Muroga have the minimum number of connections as well as the minimum number of gates, except for the two modules for the two least significant bit positions. In general, it is extremely difficult to prove the minimality of the number of gates in an arbitrarily large logic network, and it is even more difficult to prove the minimality of the number of connections. Both problems have been solved for n-bit adders of NOR gates in single-rail input logic.

本文言語English
ページ(範囲)969-976
ページ数8
ジャーナルIEEE Transactions on Computers
C-32
10
DOI
出版ステータスPublished - 1983 10月
外部発表はい

ASJC Scopus subject areas

  • ソフトウェア
  • 理論的コンピュータサイエンス
  • ハードウェアとアーキテクチャ
  • 計算理論と計算数学

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