Performance evaluation on low-latency communication mechanism of DIMMnet-2

By recent performance improvement of interconnection networks for PC cluster, a standard I/O bus which connects network interface becomes the performance bottleneck. DIMMnet is a network interface which can solve the problem by using the memory bus instead of PCI bus or other I/O buses. The second generation network interface DIMMnet-2 can be connected with DDR-SDRAM slot. Although the current board is a prototype using an FPGA, using BOTF which is low latency PIO communication method, the bidirectional bandwidth reaches about 1087.56 MByte/s, and the minimum unidirectional latency is about 0.632 μs.