Performance improvements of on-chip solar cell for microsystem

Daigo Zenibayashi, Takaya Sugiura, Nobuhiko Nakano

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

Developing a microsystem that carries out a series of systems from acquisition of information to transmission to the outside on one chip. In this paper, we choose the solar cell as a power source of the system and the element functioning as the sensor part, and aim for improvement of function by using 0.18 μm standard CMOS process. Increasing the boundary area between the P-substrate and the N-Well which acts as a solar cell using a structure in which holes are opened in the N-Well as well as the bottom area of the N-Well. The area occupied by the solar cell was fixed at 100 μm × 100 μm, and the length of one side of the hole was varied between 1.40 and 5.44 μm. As a result, the maximum power generation efficiency was improved when the length of one side was 1.4 μm, and the value of the short circuit current increased by about 1% as compared with plain structure without hole. Also, no-dummy metal area(aperture) dependence was observed. When the no-dummy area increased the short circuit current has not proportional to the occupied area. However, regarding the open circuit voltage, superiority effect is observed.

本文言語English
ホスト出版物のタイトル2017 International Symposium on Electronics and Smart Devices, ISESD 2017
出版社Institute of Electrical and Electronics Engineers Inc.
ページ282-286
ページ数5
ISBN(電子版)9781538627785
DOI
出版ステータスPublished - 2017 7月 1
イベント2nd International Symposium on Electronics and Smart Devices, ISESD 2017 - Yogyakarta, Indonesia
継続期間: 2017 10月 172017 10月 19

出版物シリーズ

名前2017 International Symposium on Electronics and Smart Devices, ISESD 2017
2018-January

Other

Other2nd International Symposium on Electronics and Smart Devices, ISESD 2017
国/地域Indonesia
CityYogyakarta
Period17/10/1717/10/19

ASJC Scopus subject areas

  • 器械工学
  • 人工知能
  • ハードウェアとアーキテクチャ
  • 電子工学および電気工学
  • 制御と最適化

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