One kind of digital PLL (DPLL), i.e., nonuniform sampling DPLLs, can control the sampling intervals. As a result, they can be used for timing extraction circuits and carrier extraction circuits in PCM and PSK systems, etc. The present authors have already proposed a new nonuniform sampling DPLL, the multisampling digital tanlock loop (MSDTL), which can handle more than two samples in each time period of the input sinusoid. The MSDTL can satisfy the sampling theorem because of the multisampling scheme. Therefore, a system with the MSDTL can easily utilize higher digital signal processing technologies. However, the performances of the MSDTL have not been reported yet. This paper presents detailed analyses of the MSDTL and shows its superior performances. In addition, the range (phase detection characteristic) extended MSDTL (RE‐MSDTL) is proposed.
|ジャーナル||Electronics and Communications in Japan (Part I: Communications)|
|出版ステータス||Published - 1989 9月|
ASJC Scopus subject areas
- コンピュータ ネットワークおよび通信