TY - GEN
T1 - Preliminary evaluation of batch-learning self-organizing map algorithm on a graphic processor
AU - Shitara, Akihiro
AU - Nishikawa, Yuri
AU - Yoshimi, Masato
AU - Abe, Takashi
AU - Ikemura, Toshimichi
AU - Amano, Hideharu
PY - 2010
Y1 - 2010
N2 - In this paper, we introduce a GPU implementation and evaluation of batch learning self-organizing maps (BL-SOM) algorithm, which improves Kohonen's original SOM algorithm by making input data sequence independent from learning process. We used CUDA provided by NVIDIA Corporation for parallel programming, profiling, and data flow optimization so as to exploit inherent datalevel parallelism of the algorithm. With various parameter combinations, implementation on GTX280 achieved 250 times higher performance compared to Intel's Core2Quad Q6600 2.40GHz when parameters of map size, dimension of vectors, learning size and iteration of learning were 960×960, 136, 70 and 1, respectively.
AB - In this paper, we introduce a GPU implementation and evaluation of batch learning self-organizing maps (BL-SOM) algorithm, which improves Kohonen's original SOM algorithm by making input data sequence independent from learning process. We used CUDA provided by NVIDIA Corporation for parallel programming, profiling, and data flow optimization so as to exploit inherent datalevel parallelism of the algorithm. With various parameter combinations, implementation on GTX280 achieved 250 times higher performance compared to Intel's Core2Quad Q6600 2.40GHz when parameters of map size, dimension of vectors, learning size and iteration of learning were 960×960, 136, 70 and 1, respectively.
KW - CUDA
KW - GPGPU
KW - GPU
KW - Self-organizing map
UR - http://www.scopus.com/inward/record.url?scp=77954595546&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77954595546&partnerID=8YFLogxK
U2 - 10.2316/p.2010.676-089
DO - 10.2316/p.2010.676-089
M3 - Conference contribution
AN - SCOPUS:77954595546
SN - 9780889868205
T3 - Proceedings of the 9th IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2010
SP - 96
EP - 104
BT - Proceedings of the 9th IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2010
PB - Acta Press
T2 - 9th IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2010
Y2 - 16 February 2010 through 18 February 2010
ER -