Reducing the configuration loading time of a coarse grain multicontext reconfigurable device

Toshiro Kitaoka, Hideharu Amano, Kenichiro Anjo

研究成果: Chapter

15 被引用数 (Scopus)

抄録

High speed and low cost configuration loading methods for a coarse grain multicontext reconfigurable device DRP(Dynamically Reconfigurable Processor) are proposed and implemented. In these methods, the configuration data is compressed on the host computer before loading, and decoded at the time of loading by circuits implemented on a part of logics. Unlike conventional reconfigurable device, the logic for decoder circuits is switched with application circuits immediately after loading in multicontext reconfigurable devices. Thus, the circuit does not use a real estate of the chip during the execution. Two compression methods LZSS-ARC and Selective coding are implemented and evaluated. LZSS-ARC achieves better compression ratio, while Selective coding can work at the same frequency of the data loading.

本文言語English
ホスト出版物のタイトルLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
編集者Peter Y. K. Cheung, George A. Constantinides, Jose T. de Sousa
出版社Springer Verlag
ページ171-180
ページ数10
ISBN(電子版)3540408223, 9783540408222
DOI
出版ステータスPublished - 2003

出版物シリーズ

名前Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
2778
ISSN(印刷版)0302-9743
ISSN(電子版)1611-3349

ASJC Scopus subject areas

  • 理論的コンピュータサイエンス
  • コンピュータ サイエンス(全般)

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