Spin qubits created from gate-defined silicon metal–oxide–semiconductor quantum dots are a promising architecture for quantum computation. The high single qubit fidelities possible in these systems, combined with quantum error correcting codes, could potentially offer a route to fault-tolerant quantum computing. To achieve fault tolerance, however, gate error rates must be reduced to below a certain threshold and, in general, correlated errors must be removed. Here we show that pulse engineering techniques can be used to reduce the average Clifford gate error rates for silicon quantum dot spin qubits down to 0.043%. This represents a factor of three improvement over state-of-the-art silicon quantum dot devices and extends the randomized benchmarking coherence time to 9.4 ms. By including tomographically complete measurements in our randomized benchmarking, we infer a higher-order feature of the noise called the unitarity, which measures the coherence of noise. This, in turn, allows us to theoretically predict that average gate error rates as low as 0.026% may be achievable with further pulse improvements. These spin qubit fidelities are ultimately limited by incoherent noise, which we attribute to charge noise from the silicon device structure or the environment.
ASJC Scopus subject areas