@inproceedings{f23f814018014888af49b50fad5ab9ac,
title = "Unbalanced buffer tree synthesis to suppress ground bounce for fine-grain power gating",
abstract = "This paper describes a new approach to reduce the ground bounce (GB) while keeping the wakeup time short for fine-grain power gating. We propose a novel algorithm to synthesize an optimal unbalanced buffer tree (UBT) that turns on parallel power switches with slight time differences. We have applied our algorithm to function units of a 32-bit microprocessor. Experimental results have revealed that our UBT gives better solution than the conventional daisy-chain approach in the space of wakeup time and GB. For example, in the ALU, our UBT suppressed the maximum GB voltage to 16mV which is 24% smaller than that of the parallel daisy chain, while keeping the wakeup time 0.6ns. In the 32b×32b multiplier, our UBT suppressed GB by 32% lower than the daisy chain but still kept the wakeup time 0.7ns. The microprocessor test chip with our UBT technique is successfully under operation.",
keywords = "ground bounce, low power, power gating",
author = "Kimiyoshi Usami and Makoto Miyauchi and Masaru Kudo and Kazumitsu Takagi and Hideharu Amano and Mitaro Namiki and Masaaki Kondo and Hiroshi Nakamura",
note = "Publisher Copyright: {\textcopyright} 2014 IEEE.; 2014 16th International Symposium on System-on-Chip, SoC 2014 ; Conference date: 28-10-2014 Through 29-10-2014",
year = "2014",
month = dec,
day = "2",
doi = "10.1109/ISSOC.2014.6972438",
language = "English",
series = "2014 International Symposium on System-on-Chip, SoC 2014",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
editor = "Jari Nurmi and Peeter Ellervee and Dragomir Milojevic and Ondrej Daniel and Tommi Paakki",
booktitle = "2014 International Symposium on System-on-Chip, SoC 2014",
}